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Connection of partial discharge test circuit

time:2020/12/22   source:华天电力  reading:254 time

1) The standard test circuit, also known as the parallel method, is suitable for the test product that must be grounded. Its disadvantage is that the high-voltage lead-to-ground stray capacitance is connected to the CX in parallel, which will reduce the test sensitivity.


(2) Series method, which requires the low-voltage end of the test sample to float to the ground. Its advantage is that the transformer inlet capacitance, the high-voltage line-to-ground stray capacitance and the coupling capacitor CK are connected in parallel, which is beneficial to improve the test sensitivity; the disadvantage is that the sample will be damaged when damaged Input unit.



Partial Discharge Detector.png


(3) Balance method test circuit: The two test samples are required to be close, at least the capacitance is the same order of magnitude. Its advantage is that in the case of strong external interference, it can achieve a better interference suppression effect and eliminate the stray capacitance of the transformer. It is affected, and large capacitance test can be done; the disadvantage is that two similar samples are required, and when a discharge occurs, it is necessary to try to distinguish which sample is discharging.


Due to the limitation of field test conditions (it is not easy to find two similar samples and ensure that one sample does not discharge), it is difficult to achieve the field balance method. In addition, because the series method is used, if the sample breaks down, It will cause relatively large damage to the equipment, so out of the idea of protecting the equipment, the parallel method is generally used in the field test.


The high-voltage filter can prevent the test product from breakdown during the test and damage other equipment, block the discharge current from entering the test transformer, and can suppress the harmonic interference from the high-voltage power supply. The isolation filter separates the interference of the power supply from the entire test system , Reduce the background interference of the entire test system.


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